MyRoboPath
electronics15 min readUpdated 2026-03-14Intermediate

Truth Tables & Boolean Algebra: Combinational Logic Design

Design digital logic circuits systematically: construct multi-input truth tables, master Boolean algebra laws (De Morgan’s Laws, Distributive, Absorption), and simplify gate counts using Karnaugh Maps.

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Key Engineering Takeaways

  • A Truth Table lists every possible combination of binary inputs (for n inputs, there are 2^n rows) and the resulting output.
  • Boolean Algebra operations: AND is written as multiplication (A · B), OR is written as addition (A + B), NOT is written with an overbar (NOT(A)).
  • De Morgan’s Laws: NOT(A · B) = NOT(A) + NOT(B) (Break the line, change the sign) and NOT(A + B) = NOT(A) · NOT(B).
  • Boolean simplification allows engineers to eliminate redundant IC gate chips, reducing PCB power draw, cost, and propagation delay.
  • Karnaugh Maps (K-Maps) group adjacent 1s on a 2D Gray-code grid to visually find minimal Sum-of-Products equations.
Prerequisites
  • Logic Gates and Binary basics
Required Hardware / Tools
  • Logic ICs (74HC08, 74HC32, 74HC04)
  • Breadboard and LEDs for physical verification

What is a Truth Table? Mapping All Input Permutations

A **Truth Table** is a comprehensive mathematical table specifying the output state of a digital logic circuit for every possible combination of binary inputs. If a circuit has n binary inputs, the truth table will have exactly: **Formula:** Total Rows = 2^n - 2 Inputs (A, B) → 2^2 = 4 rows (00, 01, 10, 11) - 3 Inputs (A, B, C) → 2^3 = 8 rows - 4 Inputs (A, B, C, D) → 2^4 = 16 rows
Truth table structure diagram
Figure 3.1: Truth table structure showing 2-input binary permutation combinations.Visual Guide

Master Truth Table Reference for All Standard Logic Gates

### Comprehensive 2-Input Master Reference Table: | Input A | Input B | NOT A (overline{A}) | AND (A cdot B) | OR (A + B) | NAND (overline{AB}) | NOR (overline{A+B}) | XOR (A oplus B) | XNOR (overline{A oplus B}) | | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | | **0** | **0** | 1 | **0** | **0** | **1** | **1** | **0** | **1** | | **0** | **1** | 1 | **0** | **1** | **1** | **0** | **1** | **0** | | **1** | **0** | 0 | **0** | **1** | **1** | **0** | **1** | **0** | | **1** | **1** | 0 | **1** | **1** | **0** | **0** | **0** | **1** |
Master logic gate truth table matrix
Figure 3.2: Master logic gate comparative truth table matrix.Visual Guide

De Morgan's Theorems: Transforming ANDs into ORs

Discovered by Augustus De Morgan, these two fundamental theorems allow engineers to convert between AND and OR gate networks: ### 1. First Theorem (NAND to Inverted OR): **Formula:** NOT(A · B) = NOT(A) + NOT(B) *"A NAND gate is logically identical to an OR gate with inverted inputs."* ### 2. Second Theorem (NOR to Inverted AND): **Formula:** NOT(A + B) = NOT(A) · NOT(B) *"A NOR gate is logically identical to an AND gate with inverted inputs."* **The Memory Rhyme**: *"Break the line, change the sign!"* (Break the continuous overbar and flip · to + or + to ·).
De Morgan RuleDe Morgan’s laws allow you to build an entire digital circuit using ONLY standard 74HC00 NAND chips, saving board space and component types.

Frequently Asked Questions

What is a Karnaugh Map (K-Map)?

A Karnaugh Map is a visual graphical method for simplifying complex Boolean expressions without having to memorize algebraic formulas. It organizes truth table outputs into an adjacent grid where adjacent cells differ by only 1 bit (Gray Code), allowing terms to be grouped into rectangles of 2, 4, or 8 to eliminate variables.

Tags:#Truth Tables#Boolean Algebra#De Morgans Laws#Karnaugh Maps#Digital Logic#Circuit Simplification